Scalable, reconfigurable GPS receiver
US6646595B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2002 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Aug 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/3805
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A GPS receiver (26) for processing GPS satellite signals and adapted for connection to a client device (24). The receiver (26) includes a down converter (44), a correlator (46), and a microcomputer A. The microcomputer A has a microprocessor A, a first memory (48A), a second memory (48B, 148B), and an input/output interface (50). The input/output interface (50) is capable of being connected to the client device (24). The first memory (48A) contains a first set of instructions for the microprocessor A to download and store in the second memory (48B, 148B) at least one time critical GPS software module (A1, A2, . . . AN) from the client device (24). The first memory (48A) also contains a second set of instructions for the microprocessor A to determine whether to download and store in the second memory (48B, 148B) a plurality of non-time critical software modules (B1, B2, . . . BN) from the client device (24).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.