Selection apparatus and method
US6647436B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2000 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Jan 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R29/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Two interfaces or operating modes are designed into the hardware and firmware. Selection between these two interfaces, or operating modes, is indicated by the position of a jumper on an IDE/ATAPI-style jumper block. A pull-up resistor and interface type detection signal are connected to a pin on the IDE/ATAPI-style jumper block associated with a jumper that is not monitored by the IDE/ATAPI master/slave selection detect (or other configuration) hardware or used to pull-down or pull-up another jumpered pin on the jumper block. When a jumper is placed between this pin, and a pin used to pull-up or pull-down another jumpered pin the interface type detection signal will be read as being at the pulled-up or pulled-down logic level, respectively. Otherwise, the IDE/ATAPI master/slave selection (or other configuration) detect hardware will function normally.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.