Transpose address mode in general purpose DSP processor
US6647484B1 · kind B1 · utility
35Cited by
19References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2000 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Mar 6, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a register-indirect addressing mode using modulo arithmetic to transpose addresses for digital processing systems. The preferred systems and methods permit direct access of column data, which improves matrix computation significantly. The overhead of transpose mode is minimal because it can be implemented, if desired, by sharing hardware and/or software used in circular buffers. Transpose addressing mode also reduces program size and processor power consumed by reducing the sequence of instruction cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.