Integrated circuit charge pumps having control circuits therein that inhibit parasitic charge injection from control signals
US6650156B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2002 |
| Grant date | Nov 18, 2003 |
| Priority date | — |
| Expiry date | Aug 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/162
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Integrated circuit charge pumps reduce parasitic charge injection from signals that drive control inputs of the charge pumps. This reduction in parasitic charge injection can be utilized to lower phase error when the charge pumps are used in phase-locked loops (PLLs). A charge pump may include an output current source and a control circuit that drives the output current source with control signals in a preferred manner. The output current source may include a totem pole driver therein. This totem pole driver includes at least an upper PMOS supply transistor and a lower PMOS current source transistor that are disposed in series in a pull-up path extending between an output of the driver and a power supply line (e.g., Vdd). The control circuit may include a pull-up control circuit that is configured to drive a gate of the upper PMOS supply transistor with a PMOS turn-on voltage in response to a leading edge of a pull-up control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.