Method for allocating priorities to plurality of DMA engines for processing data packets based on bus phase and transactions status
US6651119B2 · kind B2 · utility
6Cited by
11References
3Claims
0Family size
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Key dates
| Filing date | May 20, 2002 |
| Grant date | Nov 18, 2003 |
| Priority date | — |
| Expiry date | Sep 6, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for processing data packets through direct memory access (DMA) in transferring data packets between a bus and an apparatus containing DMA engines. The DMA engines process different contexts, also referred to as distinct logical data streams. The phase of a bus along with the status of DMA transactions are monitored. The phase and the status are used to dynamically allocate priorities to the DMA engines to maximize the efficiency in processing data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.