Plasma display panel display device and drive method
US6653994B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2001 |
| Grant date | Nov 25, 2003 |
| Priority date | — |
| Expiry date | Apr 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/066
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
To provide a PDP display device and a drive method which use a set-up pulse having a portion that drops in voltage at a rate of 2V/&mgr;sec or more, whereby the occurrence of discharge errors in a sustain period can be suppressed even when wall charges are not sufficiently erased in an erase period and excess wall charges remain on some or all electrodes in a set-up period. To this end, the drop portion of the set-up pulse applied to a scan electrode group is set after a pulse applied to a sustain electrode reaches a voltage which does not cause a discharge between the sustain and scan electrodes. As a result, the occurrence of discharge errors in the sustain period is suppressed, without prolonging the set-up period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.