Technique of monitoring abnormality in plurality of CPUs or controllers
US6654648B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2001 |
| Grant date | Nov 25, 2003 |
| Priority date | — |
| Expiry date | Jan 15, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S903/947
- WIPO fieldTransport
- WIPO sectorMechanical engineering
Abstract
The technique of the present invention prevents endless circulation of reset operations of CPUs in a control system including a plurality of CPUs that mutually monitor the opposite CPUs. The plurality of CPUs, which are connected with one another and include a first CPU (272) and a second CPU (262), are utilize to control operations of prime movers. The first CPU (272) has a first reset execution unit that carries out a first reset event, which resets a circuit configuration of a predetermined range including the second CPU (262) in response to input of a reset signal. The second CPU (262) has a second reset execution unit that does not output the reset signal to the first CPU (272) in response to the reset of the second CPU (262) by the first reset event but outputs the reset signal to the first CPU (272) in response to detection of abnormality arising in the first CPU (272).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.