Vertical fault isolation in a computer system
US6654903B1 · kind B1 · utility
23Cited by
32References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 2000 |
| Grant date | Nov 25, 2003 |
| Priority date | — |
| Expiry date | May 20, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/18
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention provides a method for fault isolation in a computer system, such as a network device. The method calls for providing a plurality of modular processes, and forming groups, based on hardware in the computer system, of one or more of the plurality of modular processes. A fault within a group is detected, and recovery from the detected fault is accomplished without affecting processes or hardware in other groups.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.