Method to determine retries for parallel ECC correction in a pipeline
US6654925B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2000 |
| Grant date | Nov 25, 2003 |
| Priority date | — |
| Expiry date | Nov 10, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0855
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is an apparatus and means for searching a cache directory with full ECC support without the latency of the ECC logic on every directory search. The apparatus allows for bypassing the ECC logic in an attempt to search the directory. When a correctable error occurs which causes the search results to differ, a retry will occur with the corrected results used on the subsequent pass. This allows for the RAS characteristics of full ECC but the delay of the ECC path will only be experienced when a correctable error occurs, thus reducing average latency of the directory pipeline significantly. Disclosed is also a means for notifying the requester of a retry event and the ability to retry the search in the event that the directory is allowed to change between passes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.