Self test method and device for dynamic voltage screen functionality improvement
US6656751B2 · kind B2 · utility
3Cited by
16References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2001 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Jan 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed is a device that includes a built-in-self-test controller having a mechanism for providing an interface signal that indicates whether a dynamic voltage screen (DVS) test is being performed. The self-test controller is associated with a memory array that includes a clock having a clock speed. The memory array also includes a clock adjuster that receives the interface signal and reduces the clock speed when the interface signal indicates that a DVS test is being performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.