Operational amplifier output stage and method
US6657495B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2002 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Apr 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45366
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multi-stage differential amplifier with rail-to-rail input may utilize an output stage including first and second low-voltage rated transistors and first and second high-voltage transistors. The first low-voltage rated transistor and the first high-voltage rated transistor may be connected in series, and the second low-voltage rated transistor and the second high-voltage rated transistor may be connected in parallel. The low-voltage rated transistors are biased by signals provided by the input stage. In this way, the input stage controls the biasing of the low-voltage rated transistors in the output stage, thereby increasing the overall gain and speed of the amplifier system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.