DMA computer system for driving an LCD display in a GPS receiver
US6657633B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 19, 2000 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Dec 1, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/39
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A DMA computer system (10) for driving a peripheral device such as an LCD display (12) of a GPS receiver without stealing excessive cycles from a CPU (18). The DMA computer system (10) includes a CPU (18), a first memory (20) that may be written to or read by the CPU (18), a second memory (22) that may be written to or read by the CPU (18), and a DMA controller (24) coupled with the CPU (18) and the second memory (22). The DMA controller (24) is operable to: read data from the second memory (22) and transfer the data to the peripheral device; delay the CPU (18) from accessing the second memory (22) while the DMA controller (24) is reading data from the second memory (22); enable the CPU (18) to regain access to the second memory (22) once the DMA controller (24) has finished reading data from the second memory (22); and allow the CPU (18) to access the first memory (20) without delay even while the DMA controller (24) is reading data from the second memory (22).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.