Multi channel filtering device and method
US6658440B1 · kind B1 · utility
4Cited by
9References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2000 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Feb 24, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2218/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A filter comprising of an internal memory for storing data and coefficients; an address generation unit, for generating memory addresses; a multiply and accumulate unit (i.e.—MAC unit), for performing multiply and accumulate functions. The filter can operate in a plurality of modes, such as multiple or single channel FIR filtering; multiple or single channel IIR filtering; multiple or single channel echo cancellation; multiple or single channel decimation and multiple or single channel extrapolation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.