Wafer chuck, exposure system, and method of manufacturing semiconductor device
US6664549B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2002 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Jul 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/6838
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a wafer chuck for flatly vacuum-chucking a semiconductor wafer (11) supported by support pins (15) such that a pressure in a suction chamber (13) surrounded by an external wall (12), the upper surface of the external wall (12) is formed to be lower than the upper surfaces of the support pins, and the upper surface of the external wall (12) does not pressure the semiconductor wafer (11), a distance (L1) between the external wall (12) and closest support pins (15a) is up to 1.8 mm, and an alignment pitch. (L2) of the support pins (15) aligned inside the closest support pins (15a) to the external wall (12) is not more than 1.5 times of the distance (L1) between the external wall (12) and the closest support pins (15a).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.