FET active load and current source
US6664842B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2001 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Dec 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45696
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention is a circuit comprising two series-coupled field effect transistor (FET) devices with a resistor network coupled in parallel forming a composite device (that can be substituted directly for a single FET device). In applications such as active loads or current sources, the composite device exhibits a greater breakdown voltage and superior high-frequency characteristics. The resistor network provides optimum direct current (DC) bias for depletion mode devices and superior high-frequency loading. Bandwidth and stability are both increased. Furthermore, this circuit is compatible with depletion mode FET processes having a single fixed threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.