Method and apparatus for trimming high-resolution digital-to-analog converter
US6664909B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2001 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Aug 13, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for trimming a high-resolution digital-to-analog converter (DAC) utilizes floating-gate synapse transistors to trim the current sources in the DAC by providing a trimmable current source. Fowler-Nordheim electron tunneling and hot electron injection are the mechanisms used to vary the amount of charge on the floating gate. Since floating gate devices store charge essentially indefinitely, no continuous trimming mechanism is required, although one could be implemented if desired. By trimming the current sources with high accuracy, a DAC can be built with a much higher resolution and with smaller size than that provided by intrinsic device matching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.