Patent · US Expired

Circuit and method for rapid reading of an image cell

US6665011B1 · kind B1 · utility

0Cited by
4References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 8, 1999
Grant dateDec 16, 2003
Priority date
Expiry dateJun 8, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04N25/77
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A circuitry for high-speed reading of a video cell for a video pickup chip including a plurality of such video cells disposed in the form of a two-dimensional array, and a read-out logic designed for imaging a high input signal dynamic volume onto a reduced output signal dynamic volume, wherein the photosensitive element of the video cell is connected to the first main electrode of a first MOS transistor (M0) and to the gate of a second MOS transistor (M1) such that the gate and the other main electrode of the first MOS transistor (M0) are short-circuited and applied to an invariable potential (Vpp) so as to achieve a logarithmic characteristic line, and that an output signal amplifier is connected to the second main electrode of the second MOS transistor (M1). Moreover, a method of high speed reading of this video cell is described. The invention excels itself by the provision that a further MOS transistor (Mr1) of the same charge carrier type, which is connected in parallel with the first MOS transistor (M0), is provided and has a main electrode short-circuited to the first main electrode of the first MOS transistor (M0), and that a reset voltage pulse is applicable to the gate e…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.