Double balanced mixer circuit
US6665527B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 2000 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | May 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D7/1491
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A double balanced mixer circuit 10 receives an input signal (RFIN) at first input terminals (14), supplying that signal to the primary side of a transformer (12). The secondary side of the transformer (12) is coupled to the bases of transistors (18 and 26) that supply the tail currents to a pair of differential transistors. The center tap of transformer (12) receives a voltage (VBIAS) that keeps the transistors (18 and 26) biased in their linear regions. A capacitor (16) provides an AC ground at the center tap point of the transformer (12). The first differential transistor pair (20 and 22) and the second differential transistor pair (28 and 30) receive a differential signal (LO) at second input terminals 15. A differential signal IFOUT down-converted in frequency from the RF frequency range to the IF frequency range is supplied at output terminals (34).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.