Method and apparatus for preventing unauthorized access of memory devices
US6665782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2001 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Apr 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for preventing unauthorized access to data stored in memory utilizing two programmable logic devices as front end interfaces for the memory device and the data processing device which is to utilize the memory device, respectively. The two programmable logic devices are complementary programmed such that the signal lines between the data processing device and the memory core and/or their timing are scrambled at the interface between the two programmable logic devices, but are properly ordered with the proper timing at the interface between the memory core and the first programmable logic device and the interface between the data processing device and the second programmable logic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.