Very high speed page operations in indirect accessed memory systems
US6665787B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2001 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Nov 16, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1009
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page operations without actually accessing physical memory data contents. In this system, the actual data of the pages involved in the operation are never accessed by the processor and…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.