Method and apparatus for updateable flash memory design and recovery with minimal redundancy
US6665813B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2000 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Mar 4, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus is presented for updating flash memory that contains a write protected code, a first copy of rewritable recovery code, a second copy of rewritable recovery code, and a rewritable composite code. Each block of rewritable code contains a checksum code to detect if the block of code has been corrupted. If it is detected that the first copy of the recovery code is corrupted then the second copy of the recovery code is copied into the first copy of the recovery code. If it is detected the second copy of the recovery code is corrupted then the first copy of the recovery code is copied into the second copy of the recovery code. The recovery code is responsible for checking and updating the composite code. If it is detected the composite code is corrupted then a fresh copy of the composite code is obtained from a removable storage device or a network connection. The data processing system is booted by executing the write protected code, the first copy of the recovery code, and the composite code. There is a minimum of redundant code by only replicating two copies of the recovery code while, at the same time, guaranteeing both the integrity and the updateability of…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.