Method and apparatus for reducing inefficiencies in shared memory devices
US6670959B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2001 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Mar 12, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/18
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A graphics system that may be shared between multiple display channels includes a frame buffer, an arbiter, and two pixel output buffers. The arbiter arbitrates between the display channels' requests for display information from the frame buffer and forwards a selected request to the frame buffer. The frame buffer is divided into a first and a second portion. The arbiter alternates display channel requests for data between the first and second portions of the frame buffer. The frame buffer outputs display information in response to receiving the forwarded request, and pixels corresponding to this display information are stored in the output buffers. The arbiter selects which request to forward to the frame buffer based on a relative state of neediness of each of the requesting display channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.