Active matrix display device
US6671023B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2001 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Jan 24, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2340/0421
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The active matrix display device of this invention operates under two operation modes: a normal operation mode in which the pixel element electrode sequentially receives the pixel element voltage in response to an image signal sequentially inputted and a memory operation mode in which display is made based on the data held by the retaining circuit. In this active matrix display device, at least a part of the retaining circuit is set for the predetermined voltage and functions as a storage capacitance element for holding the voltage between the pixel element electrode and the common electrode under the normal operation mode. In this configuration, it is possible to reduce the size of the storage capacitance element originally disposed, because at least a part of the retaining circuit works as the storage capacitance element. Therefore, as the size of the storage capacitance element gets smaller, the size of the pixel element can also be smaller, leading to the size reduction of the device as a whole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.