Patent · US Expired

Power MOS transistor with overtemperature protection circuit

US6671152B1 · kind B1 · utility

10Cited by

5References

2Claims

0Family size

Assignee

GKR Gesellschaft fur Fahrzeugklimaregelung mbH · DE

Inventors

Walter Hersel · Leonberg, DE
Wolfram Breitling · Sachsenheim, DE
Reinhold Weible · Stuttgart, DE
Rolf Falliano · Welzheim, DE

Key dates

Filing date	Jan 5, 2001
Grant date	Dec 30, 2003
Priority date	—
Expiry date	Jan 5, 2021

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A power MOS transistor having a PMT chip located in a transistor housing in which the temperature of the transistor barrier junction is monitored is described. Protection of the PMT chip against overload and permanent damage is guaranteed without negatively affecting its switching function in that a protective circuit is provided in the transistor housing which directly measures the temperature of the transistor barrier junction using a temperature measuring element, and when a predefined or predefinable limit barrier junction temperature is reached reduces the drain current and thus the power loss of the PMT chip, the temperature measuring element being integrated in the PMT chip or accommodated in the transistor housing together with the protective circuit as an additional chip.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.