Nonvolatile semiconductor storage device with limited consumption current during erasure and erase method therefor
US6671208B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2002 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Jun 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor storage device includes a row decoder which independently controls a plurality of row select line groups. A negative voltage generated by a debooster circuit is applied to individual row select line groups with time shifts. As a result, peaks of erase current can be suppressed, so that consumption current can be reduced. In this device, a current limiting circuit of the booster circuit limits the consumption current of the booster circuit, allowing voltages to be generated within a range under a specified current value according to the conditions of voltage application to the individual row select line groups. Thus, a further reduction of the consumption current at a shorter scale can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.