Storage, storage method, and data processing system
US6671219B1 · kind B1 · utility
1Cited by
8References
14Claims
0Family size
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Key dates
| Filing date | Nov 27, 2001 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Nov 27, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a storage device from which n bits of data are read at a time, data pieces whose logical bit positions are 0*8+k, 1*8+k, 2*8+k, 3*8+k, . . . , m*8+k (where k and m are natural numbers satisfying 0≦k≦7, 0 ≦m≦n/8−1) are stored in memory cells close to one another in a memory cell array, and the bit positions are shifted by a predetermined number of bits when data having a small number of significant bits is read from the memory cell array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.