Three state pulse width modulation code
US6671316B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 13, 2000 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Apr 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4902
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A DC balanced, single bit manipulation method and system for encoding a serial data stream having a plurality of low and high bits includes generating a pulse stream. The serial data stream is to be transferred along a serial loop. The pulse stream includes a series of pulses each having a nominal time duration. A pulse of the pulse stream is modified to have a time duration longer than the nominal time duration to encode a transition of the data stream from a low bit to a high bit. A pulse of the pulse stream is modified to have a time duration shorter than the nominal time duration to encode a transition of the data stream from a high bit to a low bit. The time duration of a pulse of the pulse stream is maintained at the nominal time duration to encode two sequential high bits of the data stream. The time duration of a pulse of the pulse stream is maintained at the nominal time duration to encode two sequential low bits of the data stream. A feature of the DC balanced, single bit manipulation method and system is that it is self clocking.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.