Measurement receiver demodulator
US6671334B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 3, 1998 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Nov 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0087
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A measurement receiver demodulator has a first processing channel for producing a filtered signal sample output where the signal samples are processed through a transmission system receiver filter and a second processing channel producing an unfiltered signal sample output where the signal samples are not processed through the transmission system receiver filter. The first processing channel down converts digitally modulated IF signal samples and filters the down converted signal samples using a combined transmission system receiver filter and front end hardware compensation filter. A synchronizer produces timing phase and rate offset parameters that are applied to a resampling filter to synchronize the filtered signal samples to symbol instances of the symbol modulation. The filtered, time-aligned signal samples are scaled using a derived scaling factor. A pilot offset level, if present, is estimated and removed. The resultant signal samples are processed through an equalizer to produce filtered, time-aligned, scaled equalized signal samples that are output as filtered signal samples. The second processing channel receives the down converted signal samples and uses compensation an…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.