Bit-rate and format insensitive all-optical clock extraction circuit
US6671467B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2002 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Jul 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0075
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.