Underfilling method for a flip-chip packaging process
US6673652B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1998 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Aug 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An underfilling method for a flip-chip packaging process includes coating a underfill material layer over bumps on a semiconductor substrate, performing a die sawing process on the semiconductor substrate to from a number of dies, and performing a flip-chip process on each of the dies to adhere each of the dies to another substrate. Because the underfill material is coated from the top of the bumps, the air-trapping problem can be eliminated. The process time is shortened to improve yield because the underfill material is dispensed over all the dies before the die-sawing process. This is different from the conventional underfilling process, which has to dispense underfill material and seal edges on each individual die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.