Semiconductor device and manufacturing method thereof
US6674114B2 · kind B2 · utility
1Cited by
5References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2002 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Jan 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
Abstract
In a semiconductor device having P type and N type wells formed bordering on a step on a P type semiconductor substrate, a first transistor (precise transistor) having a first linewidth is formed on the P type well in a step lower region while a second transistor (high-voltage transistor) having a second linewidth greater than a linewidth of the first transistor is formed on the N type well in a step higher region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.