Analog-to-digital conversion method and device, in high-density multilevel non-volatile memory devices
US6674385B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2002 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Mar 16, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital conversion method and device for a multilevel non-volatile memory device that includes a multilevel memory cell. The method comprises a first step of converting the most significant bits contained in the memory cell, followed by a second step of converting the least significant bits. The first step is completed within a time interval corresponding to the rise transient of the gate voltage, and the second step is initiated at the end of the transient. Also disclosed is a scheme for error control coding in multilevel Flash memories. The n bits stored in a single memory cell are organized in different “bit-layers”, which are independent from one another. Error correction is carried out separately for each bit-layer. The correction of any failure in a single memory cell is achieved by using a simple error control code providing single-bit correction, regardless of the number of bits stored in a single cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.