Capacitive folding circuit for use in a folding/interpolating analog-to-digital converter
US6674389B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 2002 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Feb 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/141
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An M-bit folding/interpolating analog-to-digital converter (ADC) circuit, comprising a reference voltage generator, a converter, an interpolator, an amplifying stage, a comparator, and an encoder. The converter has an amplifier that receives at least one of a plurality of first reference voltage signals and outputs a plurality of coarse bits. The converter also has N-number of folding blocks, which output a plurality of folded signals. Each folding block comprises a plurality of capacitors, a differential amplifier and a feedback element. The folded signals output by the converter are then interpolated, amplified, compared and output as a plurality of fine bits. The encoder receives the coarse and fine bits and outputs the digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.