System and method for detecting and correcting phase error between differential signals
US6674998B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 21, 2000 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Jun 6, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0067
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A phase error detector that detects phase error between differential signals. A quadrature oscillator provides in-phase (I) and quadrature phase (Q) differential carrier signals and receives a phase error signal from the phase error detector. The oscillator maintains a quarter cycle phase delay between the I and Q carrier signals based on the phase error signal. The phase error detector includes a summing network and first and second bipolar transistor mixer circuits. The summing network develops four sum signals by summing respective pairs of the differential components of the I and Q carrier signals. A bias circuit biases the transistors to turn on at positive base voltages. The mixer circuits may include filter capacitors so that the transistors are responsive to positive base voltages. The mixer circuits develop polarity signals based on the sum signals, and the resulting phase error signal is the differential of the polarity signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.