Method and system for predicting worst-case capacitive and inductive switching vector
US6675365B2 · kind B2 · utility
194Cited by
26References
18Claims
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Key dates
| Filing date | Dec 14, 2001 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Jan 17, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for determination of the worst case switching vector, which greatly reduces the search space complexity. A single simulation is performed in the time-domain wherein the roles of the victim and attacker conductors are switched. In particular, the search space is reduced by virtue of the fact that certain combinations for the behavior attacker conductors are excluded. Only the phases of the attacker signals need to be determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.