High-voltage periphery
US6677657B2 · kind B2 · utility
6Cited by
5References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 26, 2002 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Sep 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76286
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a component in a portion of a semiconductor substrate on insulator delimited by a lateral wall separated by an insulating layer from a peripheral region internal to the portion and heavily doped of a same first conductivity type as the substrate. A conductive plate is formed at the same time as the wall, on a layer of protection of the substrate surface, in electric contact with the peripheral region, the plate extending above said peripheral region towards the inside of the portion with respect to the wall, beyond the location above the limit between the peripheral region and the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.