Method and apparatus for implementing precision time delays
US6677796B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2001 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Jan 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/71632
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method of implementing precision time delays that provides important and novel improvements over prior techniques of implementing time delays by utilizing a new strategy for selecting the values in the sine and cosine lookup tables. Sine and cosine values which result in non-uniform amplitudes enable increased overall accuracy with fewer bits communicated from the look-up tables to the analogue portion of the system. Further, herein is provided the addition of a variable amplitude threshold crossing capability following the combining of the sine and cosine signals. The time delay accuracy of the resulting phase and amplitude hybrid system can be improved either by increasing the number of bits in the sine/cosine phase management section or by increasing the number of bits in the amplitude section. There is provided herein an optimum strategy for choosing the number of bits used in the phase and amplitude sections for the best overall delay accuracy with the fewest overall control bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.