CAM cell having compare circuit formed over two active regions
US6678184B2 · kind B2 · utility
13Cited by
4References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2002 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Jun 5, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Content Addressable Memory (CAM) cell is disclosed having an physical implementation of transistors for improving the semiconductor substrate area utilization of the CAM cell and the CAM array. The CAM cell comprises a first and second memory circuit and a compare circuit. The compare circuit of six transistors formed over two active regions. The local interconnect between the compare circuit and the first memory circuit formed of a polysilicon region. The local interconnect between the compare circuit and the second memory circuit formed of polysilicon and conductive regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.