Receiving buffer controlling method and voice packet decoder
US6678660B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2000 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Apr 25, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/6418
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A voice packet decoder has following operations. A receiving buffer stores receiving packets and outputs the oldest packet in every fixed period. When in every the fixed period, if the receiving buffer stores no packets, then a complement packet insert circuit inserts a predetermined complement packet and a counter adds one. Furthermore, a voice decoder generates a synthetic voice signal. A speech/non-speech detection circuit detects whether the synthetic voice signal is speech signal or non-speech signal. When a result of the detecting is non-speech, the counter's value is more than zero, and a number of the stored receiving packets in the receiving buffer is more than one, then a receiving buffer controller discards the oldest packet and subtracts one from the counter's value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.