Method and apparatus for supporting multiple bus masters with the accelerated graphics protocol (AGP) bus
US6678780B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 1999 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Oct 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for supporting multiple bus masters on an AGP bus is presented. A first bus master is configured as an AGP bus master and utilizes the AGP request portion of the AGP bus structure to issue bus master requests. A second bus master is configured as a PCI bus master and utilizes the PCI bus master request portion of the AGP bus to assert bus master requests. When bus master grants are received via the AGP bus, status lines are used to determine the character of the bus master grant. When the status lines indicate that the bus master grant is an AGP bus master grant, the AGP bus master performs AGP bus master operations. When the status lines indicate that the bus master grant is a PCI bus master grant, the PCI bus master is enabled and allowed to perform PCI bus mastering operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.