Using Boolean expressions to represent shapes within a layout of an integrated circuit
US6678868B2 · kind B2 · utility
2Cited by
3References
33Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2002 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Jul 31, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides a system that facilitates representing a shape within a layout of an integrated circuit using a Boolean expression. The system operates by first receiving a representation of the shape and then converting the representation of the shape into a Boolean expression that is formed using a Boolean coordinate system expressed in a two-dimensional Gray code. The system then performs operations on the shape by performing Boolean operations on the Boolean expression for the shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.