Thin film transistors on plastic substrates

US6680485B1 · kind B1 · utility

Assignee

• The Regents of the University of California · US

Inventors

• Paul G. Carey · Mountain View, US
• Patrick Smith · San Ramon, US
• Thomas W. Sigmon · Beaverton, US
• Randy C. Aceves · Livermore, US

Key dates

• Filing date: Feb 17, 1998
• Grant date: Jan 20, 2004
• Expiry date: Dec 15, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6746
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The silicon based thin film transistor produced by the process includes a low temperature substrate incapable of withstanding sustained processing temperatures greater than about 250° C., an insulating layer on the substrate, a layer of silicon on the insulating layer having sections of doped silicon, undoped silicon, and poly-silicon, a gate dielectric layer on the layer of silicon, a layer of gate metal on the dielectric layer, a layer of oxide on sections of the layer of silicon and the layer of gate metal, and metal contacts on sections of the layer of silicon and layer of gate metal defining source, gate, and drain contacts, and interconnects.