Semiconductor wafer with process control modules
US6680523B2 · kind B2 · utility
3Cited by
2References
4Claims
0Family size
Inventors
Key dates
| Filing date | Feb 21, 2002 |
| Grant date | Jan 20, 2004 |
| Priority date | — |
| Expiry date | Feb 21, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer (1) has a multitude of chips (5), of which chips (5) each one of a given number of chips (5) is situated in one of a multitude of adjacent exposure fields (2), and further has process control modules (4) which are each arranged in an exposure field (2), namely each in place of at least one chip (5).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.