Hiccup-mode short circuit protection circuit and method for linear voltage regulators
US6680837B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 2001 |
| Grant date | Jan 20, 2004 |
| Priority date | — |
| Expiry date | May 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H3/087
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A hiccup-mode short circuit protection circuit and method for a linear voltage regulator using a FET pass transistor uses the capacitance of the pass transistor's gate as a timing element. The regulator's output voltage is monitored, and when it droops below a voltage indicative of a short-circuit condition, the regulator's drive signal is disconnected from the pass transistor. While the short-circuit condition persists, a first current is provided to charge the pass transistor's gate capacitance. When the gate voltage rises above a first predetermined threshold, a second current is provided to further charge the gate capacitance. When the gate voltage rises above a second predetermined threshold, the gate capacitance is discharged. The gate capacitance is cyclically charged and discharged in this way unless the output voltage rises to indicate that the short-circuit condition has cleared, in which case the regulator's drive signal is restored to the pass transistor's gate. To reduce average power consumption, the magnitudes of the first and second currents and the values of the threshold voltages are chosen such that the pass transistor's ON duty cycle is about 10%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.