Method of forming n-and p- channel field effect transistors on the same silicon layer having a strain effect
US6682965B1 · kind B1 · utility
50Cited by
6References
10Claims
0Family size
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Key dates
| Filing date | Mar 26, 1998 |
| Grant date | Jan 27, 2004 |
| Priority date | — |
| Expiry date | Mar 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A method for forming a Field Effect Transistor (FET) within a strain effect semiconductor layer is disclosed, whereby the source and drain of the FET are formed only in the strain effect silicon layer. The FET may be formed as a gate electrode of a p-channel type field effect transistor, and a gate electrode of a n-channel type field effect transistor on the silicon layer which has the strain effect through a gate insulating film. The sources and drains of p- and n-type diffusion layers are then formed in the silicon layer having the strain effect, on both sides of the gate electrode.
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