Slew rate control of output drivers using PVT controlled edge rates and delays
US6683482B2 · kind B2 · utility
22Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2001 |
| Grant date | Jan 27, 2004 |
| Priority date | — |
| Expiry date | Aug 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00039
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A novel method and apparatus is presented for reducing the slew rate of transition edges of a digital signal on a node of an integrated circuit by adjusting the source resistance of the pre-drive devices to generate a slew-controlled pre-drive signal for driving the output drive devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.