Forward error correction for high speed optical transmission systems
US6683855B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1998 |
| Grant date | Jan 27, 2004 |
| Priority date | — |
| Expiry date | Aug 31, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J2203/0089
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Memory requirements and processing delays associated with the application of forward error correction in high speed optical transmissions are substantially reduced by mapping a forward error correction code on a row-by-row basis into unused overhead bytes in a high bit rate signal frame. By applying the forward error correction code to an entire row of the signal frame on a row by row basis, approximately one row needs to be stored at a time thereby reducing the total memory requirements for forward error correction processing. Using SONET as an exemplary application, approximately {fraction (1/9)}th of the entire SONET frame (e.g., one of nine rows) needs to be buffered for forward error correction processing. In an illustrative embodiment, four forward error correction (FEC) blocks are provided for each row for a total of 36 FEC blocks for a frame. Each FEC block comprises four bytes of correction bits for a total of 32 correction bits. These 32 correction bits are mapped to unused overhead and are used for correcting errors in one block of one row of a signal frame, wherein one block covers ¼th of the row. Other unused overhead bytes in the row can be used to carry error …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.