Variable rate digital switching system
US6683872B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1999 |
| Grant date | Jan 27, 2004 |
| Priority date | — |
| Expiry date | Jul 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2213/13299
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
There is provided a variable rate digital switching system comprising steps of: arranging a plurality of incoming TDM buses and a plurality of sending TDM buses in lattice form; providing cross-point buffers at cross-points of the incoming buses and the sending buses; connecting the cross-point buffers belonging to respective sending TDM buses to respective scheduler; connecting respective contents analyzer to respective scheduler; checking frame headers of input TDM frames by respective cross-point buffers, thereby buffering only data of time slot of destined and belonged sending bus and transmitting contents of the frame header to the contents analyzer; checking the frame header by the contents analyzer, thereby deciding the contents of data stored in the respective cross-point buffers on the own-belonged sending TDM bus, and informing them to the scheduler; performing the scheduling by the scheduler as for how time slots in the sending TDM frame is allocated in respective cross-point buffers according to the contents of the frame header and an amount of data stored in respective cross-point buffer; and inputting in turn the buffered data in the own-allocated time slots of the se…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.