Virtual condition codes
US6684323B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 27, 1998 |
| Grant date | Jan 27, 2004 |
| Priority date | — |
| Expiry date | Oct 27, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/325
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention utilizes a “virtual” condition code (VCC) which can control the instruction sequence in a microprocessor. The virtual condition code is stored in an internal, non-architected register that is not visible to the programmer, but is used by various microprocessor instructions to determine when a branch is to be taken. For example, the virtual condition code can be used as a condition for branching out of a series of repetitive instructions. The virtual condition code (VCC) can eliminate a portion of the processing overhead used when determining whether a sequential number, such as a count value in a register associated with a repetitive instruction, e.g. a LOOP, is zero. In accordance with one aspect of the present invention, a LOOP instruction will decrement a count value in a register (to maintain compatibility with the ISA). However, a corresponding branch instruction will use the virtual condition code, rather than checking the contents of the entire register, to determine whether or not to branch. In this manner, the present invention improves performance by minimizing the amount of hardware resources (i.e. compare logic) utilized while maintaini…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.