Motion adaptive de-interlacing circuit and method
US6686923B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2001 |
| Grant date | Feb 3, 2004 |
| Priority date | — |
| Expiry date | Apr 16, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/012
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit generates a complete picture from a series of digitized interlaced video fields. Each pixel in the complete picture is either duplicated from a digitized interlaced video field or interpolated from three adjoining digitized interlaced video fields. Interpolated pixels are computed from a combination of same-field and adjoining-field pixels. A percentage difference of the luminance values of the same-field and adjoining-field pixels included in the interpolation is used to maximize motion capture in the de-interlaced picture. Additional embodiments incorporate filtering of the percentage difference based on a threshold value to minimize soft noise in the de-interlaced picture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.